You might have seen chips with eight, sixteen and even 32 cores. But Anant Agarwal, an MIT genius is manufacturing the world’s first chip with 100 cores in his commercial venture Tilera

Anant is currently the Director of Massachusetts Institute of Technology’s Computer Science and Artificial Intelligence Lab (CSAIL). Tilera, the many-core chip is a product of his focus on making efficient future servers with power saving and high performance chips.

According to Wired, Tilera plans to ship the 100-core TILE-Gx later this year and the company’s next line, code-named Stratton and set for release in 2013. This will allow the TILE-GX to expand its range from as four and as many as 200 cores.

Tilera will move from a 40-nm to a 28-nm process which means that it can stuff more circuits into the same area.

Wired said that the MIT-run outfit is attracting the interest of several companies. Facebook looked at the TILE-Gx against Intel and AMD’s Xeon and Opteron server-processors. Apparently the 64-core Tilera TILEPro64 yielded at least 67 percent higher throughput than low-power x86 servers.

Today, Tilera sells chips with 16, 32, and 64 cores, and it’s scheduled to ship that 100-core monster later this year. Tilera provides these chips to Quanta, the huge Taiwanese original design manufacturer (ODM) that supplies servers to Facebook and — according to reports, Google. Quanta servers sold to the big web companies don’t yet include Tilera chips, as far as anyone is admitting. But the chips are on some of the companies’ radar screens.

Agarwal’s outfit is part of an ever growing movement to reinvent the server for the internet age. Facebook and Google are now designing their own servers for their sweeping online operations. Startups such as SeaMicro are cramming hundreds of mobile processors into servers in an effort to save power in the web data center. And Tilera is tackling this same task from different angle, cramming the processors into a single chip.

Tilera grew out of a DARPA- and NSF-funded MIT project called RAW, which produced a prototype 16-core chip in 2002. The key idea was to combine a processor with a communications switch. Agarwal calls this creation a tile, and he’s able to build these many tiles into a piece of silicon, creating what’s known as a “mesh network.”

“Before that you had the concept of a bunch of processors hanging off of a bus, and a bus tends to be a real bottleneck,” Agarwal says. “With a mesh, every processor gets a switch and they all talk to each other…. You can think of it as a peer-to-peer network.”

What’s more, Tilera made a critical improvement to the cache memory that’s part of each core. Agarwal and company made the cache dynamic, so that every core has a consistent copy of the chip’s data. This Dynamic Distributed Cache makes the cores act like a single chip so they can run standard software. The processors run the Linux operating system and programs written in C++, and a large chunk of Tilera’s commercialization effort focused on programming tools, including compilers that let programmers recompile existing programs to run on Tilera processors.

The end result is a 64-core chip that handles more transactions and consumes less power than an equivalent batch of x86 chips. A 400-watt Tilera server can replace eight x86 servers that together draw 2,000 watts. Facebook’s engineers have given the chip a thorough tire-kicking, and Tilera says it has a growing business selling its chips to networking and videoconferencing equipment makers. Tilera isn’t naming names, but claims one of the top two videoconferencing companies and one of the top two firewall companies.,

Posted By